[1]张允武,刘树林,杨 波.一种高性能LDO的缓冲器分析与设计[J].西安科技大学学报,2011,(01):117-121.
 ZHANG Yun-wu,LIU Shu-lin,YANG Bo.Analysis and design of a buffer for high performance LDO[J].Journal of Xi'an University of Science and Technology,2011,(01):117-121.
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一种高性能LDO的缓冲器分析与设计()
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西安科技大学学报[ISSN:1672-9315/CN:61-1434/N]

卷:
期数:
2011年01期
页码:
117-121
栏目:
出版日期:
2011-01-29

文章信息/Info

Title:
Analysis and design of a buffer for high performance LDO
文章编号:
1672-9315(2011)01-0117-05
作者:
张允武刘树林杨 波
西安科技大学 电气与控制工程学院,陕西 西安 710054
Author(s):
ZHANG Yun-wu LIU Shu-linYANG Bo
College of Electrical and Control Engineering, Xi'an University of Science and Technology, Xi'an 710054,China
关键词:
电源管理 低压差稳压器 瞬态响应 频率响应 静态电流
Keywords:
power management LDO transient response frequency response
分类号:
TN402
文献标志码:
A
摘要:
为了提高低压差稳压器(LDO)的动态响应性能,提出了一种新型的缓冲器电路。通过引入该缓冲器,LDO的瞬态性能得到显著提高的同时,空载时的静态电流也大大减小。对缓冲器电路的工作原理进行了分析,指出通过降低缓冲器的输出阻抗,扩展了系统的带宽,进而减小了环路的响应时间。指出通过对输出功率管的动态充放电,降低了电路的静态功耗。给出了设计实例,并采用CSMC 0.6 μm CMOS工艺模型进行仿真,仿真结果验证了所提出缓冲器的可行性及理论分析的正确性。
Abstract:
A novel buffer circuit of the Low-Dropout(LDO)regulator is presented to improve its transient behavior. By using this buffer, LDO's quiescent current in the case of light-load is greatly reduced. The working principle of the buffer circuit is analyzed, and it is pointed out that the system's bandwidth is extended by reducing the buffer's output impedance. Additionally, it also improves the respond speed of the system and reduces the quiescent power consumption. The simulation results based on the CSMC 0.6 μm CMOS process verify the correctness of the theoretical analysis and the feasibility of the proposed methods.

参考文献/References:

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备注/Memo

备注/Memo:
基金项目: 陕西省科学技术研究发展计划项目(2008K04-16); 西安市科技攻关项目(YF07020) 通讯作者: 张允武(1987-),男,江苏南通人,硕士研究生,主要从事集成电路设计的研究工作.
更新日期/Last Update: 2011-01-29